UDP/IP Ethernet
Ethernet IP core implementing UDP/IP inside the FPGA, for low-latency communication.
Overview
UDP/IP Ethernet is an Enclustra IP core for UDP/IP communication. Because the whole stack runs inside the FPGA without a processor, it delivers low-latency, high-throughput data transfer.
Positive ONE Group supports UDP/IP Ethernet end to end: choosing the right option, providing evaluation versions, helping you obtain reference designs, and supply and long-term availability in volume production. We work in English and Japanese.
Appearance and internal structure
Key specifications
| Supported standards | UDP/IP over Ethernet |
|---|---|
| Supported FPGA families | AMD (Xilinx) / Altera (Intel) |
| Speed | 1000 Mbps (depends on configuration) |
| Port configuration | Ethernet MAC plus UDP/IP stack |
| Operating mode | Hardware UDP/IP (low latency, no CPU load) |
| Latency and forwarding | Hardware processing (low latency) |
| Interfaces | AXI4-Stream / AXI4-Lite, (R)GMII |
| Licence | Project licence, evaluation version available |
| Deliverables | Netlist or encrypted RTL, sample design and user manual |
| EDA integration | Vivado IP Integrator |
Actual resource usage (LUT, FF, BRAM), supported devices and speed grades vary by configuration. Tell us your requirements and we will give concrete figures with the quotation.
Main interfaces and applications
Main interfaces
- Ethernet MAC interface
- AXI / AXI-Stream (internal FPGA interconnect)
Typical applications
- Integrating function blocks into your own FPGA design
- Shorter development and verification time
- Implementing signal processing, communication and control pipelines
Frequently asked questions
How is this IP core delivered?
It is licensed per project. An evaluation version is available so you can confirm operation on your own FPGA before production. Deliverables are a netlist or encrypted RTL, a sample design and the user manual.
Which FPGAs can UDP/IP Ethernet be used with?
The target FPGA is AMD (Xilinx) and Altera (Intel). The vendor is selected by product code. The devices listed by the manufacturer are AMD UltraScale / AMD 7-Series / Intel Cyclone V. Supported design tools are AMD ISE / AMD Vivado / Altera Quartus. If your target device is already fixed, please ask us to confirm.
How is UDP/IP Ethernet delivered and licensed?
It is supplied as a VHDL source IP core with a technical support package. Extensive synthesis-time and run-time parameters let you optimise FPGA resource usage, and custom development is available.
How can I evaluate UDP/IP Ethernet?
A three-month evaluation licence can be requested. The evaluation hardware is Mars AX3 FPGA module / Mars ST3 base board. Please contact us to discuss the configuration.
What is the price and lead time for UDP/IP Ethernet?
Pricing for UDP/IP Ethernet depends on configuration, licence type, quantity and any customisation, so we quote individually. Tell us your application and quantity in the form on this page and our engineers will confirm the specification and come back with a quotation and lead time.
Related products in the Enclustra IP core line
Other models in the same product line. Select by logic capacity, I/O count and temperature grade.
See all products using Zynq UltraScale+ MPSoC ／ See all products using Zynq-7000 SoC ／ Browse by FPGA family ／ Browse by application
Ask about UDP/IP Ethernet
UDP/IP Ethernet is handled in Japan by Positive ONE Group, value-added reseller (VAR) for Enclustra of Switzerland. We confirm availability, quantities and pricing with the manufacturer before replying.
Because pricing depends on configuration and quantity, we do not publish prices or stock levels on this site. Request an individual quotation
Design environment
- Target FPGA
- AMD (Xilinx) / Altera (Intel)
- Target devices
- AMD UltraScale / AMD 7-Series / Intel Cyclone V
- Design tools
- AMD ISE / AMD Vivado / Altera Quartus
- Evaluation
- Three-month evaluation licence (on request)
- Evaluation hardware
- Mars AX3 FPGA module
Mars ST3 base board - Licence
- Site licence (one location, radius under 5 km)