We will confirm current availability and licence terms with the manufacturer when you enquire.
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SMVsubscriber — SMV processing IP

VHDL IP for FPGAs (Alveo version available)

Hardware processing IP for Sampled Measured Values (IEC 61850-9-2) in smart grids.

SMVsubscriber — SMV processing IPCommunication IP coreSoC-e
FPGA
VHDL IP for FPGAs (Alveo version available)
Memory
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Temp
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Size
VHDL IP
Overview

Overview

Positive ONE Group can advise on SMVsubscriber — SMV processing IP in English and Japanese. EvaLicence terms, evaluation options and volume supply conditions will be confirmed with the manufacturer when you enquire.

Diagram

Appearance and internal structure

CONCEPTUAL BLOCK DIAGRAM - SMVsubscriber — SMV processing IPParserFrameAES-GMACCipherKeyMgmtOutputSecuredFPGA FABRIC (VHDL IP)
Internal block diagram (prepared by Positive ONE)
SYSTEM CONNECTION - SMVsubscriber — SMV processing IPUser logicYour logicSMVsubscriberIP CoreEthernetNetworkAXIMAC
System connection diagram
IP specification

Key specifications

The following will be confirmed with the manufacturer when you enquire. Current availability, licensing and deliverables will be confirmed with the manufacturer.

SMVsubscriber — SMV processing IP key specifications
Supported standardsIEC 61850-9-2 (Sampled Values)
Supported FPGA familiesAMD (Xilinx)
Speed- (SV processing IP)
Port configurationSV stream subscription
Operating modeSampled Values subscriber
Latency and forwardingDeterministic SV decoding
InterfacesAXI4-Stream / AXI4-Lite, GMII
LicenceProject licence, evaluation version available (current terms to be confirmed)
DeliverablesNetlist or encrypted RTL, sample design and user manual (current terms to be confirmed)
EDA integrationVivado IP Integrator

Actual resource usage (LUT, FF, BRAM), supported devices and speed grades vary by configuration. Tell us your requirements and we will give concrete figures with the quotation.

Interfaces and applications

Main interfaces and applications

Main interfaces

  • Ethernet MAC / PHY interface
  • AXI (internal FPGA interconnect)

Typical applications

  • Cyber security for substation communication (IEC 62351)
  • Protecting measured values in smart grids
  • Real-time traffic encryption for critical infrastructure
FAQ

Frequently asked questions

How is this IP core delivered?

Licence terms, evaluation options, delivery format and supply conditions will be confirmed with the manufacturer when you enquire.

Which FPGAs can SMVsubscriber — SMV processing IP be used with?

Licence terms, evaluation options, delivery format and supply conditions will be confirmed with the manufacturer when you enquire.

How is SMVsubscriber — SMV processing IP delivered and licensed?

Licence terms, evaluation options, delivery format and supply conditions will be confirmed with the manufacturer when you enquire.

How can I evaluate SMVsubscriber — SMV processing IP?

Licence terms, evaluation options, delivery format and supply conditions will be confirmed with the manufacturer when you enquire.

What is the price and lead time for SMVsubscriber — SMV processing IP?

Licence terms, evaluation options, delivery format and supply conditions will be confirmed with the manufacturer when you enquire.

Ask about SMVsubscriber — SMV processing IP

SMVsubscriber — SMV processing IP is handled in Japan by Positive ONE Group, value-added reseller (VAR) for SoC-e of Spain. We confirm availability, quantities and pricing with the manufacturer before replying.

Because pricing depends on configuration and quantity, we do not publish prices or stock levels on this site. Request an individual quotation

Design environment

Target FPGA
AMD (Xilinx)
Design tools
AMD Vivado
Evaluation
Encrypted, time-limited version (terms on request)
Evaluation hardware
SMARTzynq Brick
SMARTmpsoc Brick
MEZU-A7G8 Brick