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SocTek IP cores (time synchronisation)
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Devices: VHDL IP for FPGAs (no CPU required) / VHDL IP for FPGAs. Temperature grades: —(3)
VHDL IP for FPGAs (no CPU required)VHDL IP for FPGAs
IP cores(3)
IP
1588Tiny — CPU-less PTP Slave
VHDL IP for FPGAs (no CPU required)
Hardware-only IEEE 1588v2 slave clock IP requiring no CPU. Nanosecond-class accuracy, L2/L3 PTP support and an optimised MAC.
IPMultiSync — PTP & IRIG-B
VHDL IP for FPGAs
Precision time synchronisation IP supporting multiple PTP profiles plus IRIG-B, to around +/-100 ns, with time-server and time-bridge functions.
IPPTP Ordinary/Boundary Clock
VHDL IP for FPGAs
IEEE 1588v2 Ordinary and Boundary Clock IP (L2/L3, E2E/P2P) for high-accuracy synchronisation across the whole network.
SocTek IP cores (time synchronisation) — talk to us about your configuration
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