1588Tiny — CPU-less PTP Slave
Hardware-only IEEE 1588v2 slave clock IP requiring no CPU. Nanosecond-class accuracy, L2/L3 PTP support and an optimised MAC.
Overview
1588Tiny — CPU-less PTP Slave is a soft IP core in SoC-e’s SocTek range for precision time synchronisation. IEEE 1588 (PTP, Precision Time Protocol) achieves nanosecond-class synchronisation over a network, and 1588Tiny — CPU-less PTP Slave performs timestamping in FPGA hardware, giving accuracy and jitter that software implementations struggle to match.
It fits in minimal resources, so it can be implemented comfortably even on small, low-cost FPGAs.
Positive ONE Group supports 1588Tiny — CPU-less PTP Slave end to end: choosing the right option, providing evaluation versions, helping you obtain reference designs, and supply and long-term availability in volume production. We work in English and Japanese.
Appearance and internal structure
Key specifications
| Supported standards | IEEE 1588-2008 (PTP), 802.1AS |
|---|---|
| Supported FPGA families | AMD, Intel, Microchip and Lattice supported (lightweight) |
| Speed | 10/100/1000 Mbps |
| Port configuration | One port (PTP slave) |
| Operating mode | CPU-less PTP slave (better than +/-1 us) |
| Latency and forwarding | Hardware timestamping |
| Interfaces | Register interface, MII/GMII |
| Licence | Project licence, evaluation version available |
| Deliverables | Netlist or encrypted RTL, sample design and user manual |
| EDA integration | Integrates with Vivado, Quartus and Libero |
Actual resource usage (LUT, FF, BRAM), supported devices and speed grades vary by configuration. Tell us your requirements and we will give concrete figures with the quotation.
Main interfaces and applications
Main interfaces
- MII / GMII / RGMII / RMII
- Serial MAC-PHY interfaces such as SGMII and QSGMII
- AXI (internal FPGA interconnect)
Typical applications
- Time synchronisation in power systems (substations and power plants)
- Timestamp synchronisation across distributed measurement systems
- Frequency and phase synchronisation for base stations and broadcast facilities
Frequently asked questions
How is this IP core delivered?
It is licensed per project. An evaluation version is available so you can confirm operation on your own FPGA before production. Deliverables are a netlist or encrypted RTL, a sample design and the user manual.
Which FPGAs can 1588Tiny — CPU-less PTP Slave be used with?
Built on open standards, it can be implemented on several FPGA families, primarily AMD/Xilinx. It is supplied as VHDL source and works with EDA tools such as AMD Vivado.
How is 1588Tiny — CPU-less PTP Slave delivered and licensed?
It is supplied as a VHDL source IP core with a technical support package. Extensive synthesis-time and run-time parameters let you optimise FPGA resource usage, and custom development is available.
How can I evaluate 1588Tiny — CPU-less PTP Slave?
You can verify operation on real hardware using evaluation kits, sample designs and SoC-e’s SocTek modules or RelyUm equipment. Some configurations allow plug-and-play evaluation.
What is the price and lead time for 1588Tiny — CPU-less PTP Slave?
Pricing for 1588Tiny — CPU-less PTP Slave depends on configuration, licence type, quantity and any customisation, so we quote individually. Tell us your application and quantity in the form on this page and our engineers will confirm the specification and come back with a quotation and lead time.
Products in the same category
Products in the same application category. They belong to different product lines, so please check the specifications individually.
Ask about 1588Tiny — CPU-less PTP Slave
1588Tiny — CPU-less PTP Slave is handled in Japan by Positive ONE Group, value-added reseller (VAR) for SoC-e of Spain. We confirm availability, quantities and pricing with the manufacturer before replying.
Because pricing depends on configuration and quantity, we do not publish prices or stock levels on this site.Request an individual quotation